Dr Nigel Greer RF/Analog IC Designer

introduction | education | employment | projects | circuit design | CAD | contact

projects
I have been involved in numerous IC designs including:

Stepmind AliceE2S* 0.35u BiCMOS Quad band GSM/EDGE transceiver
Project leader and lead Tx/Lo designer
Philips UAA3545* 0.5u BiCMOS DECT transceiver
This was the first commercially successful single chip NZIF transceiver on the DECT market to include a fully integrated VCO. I designed the receiver, transmitter and synthesizer.
Philips UAA3540* 0.5u BiCMOS DECT NZIF receiver
A pioneering product: to my knowledge, this was the very first use of a polyphase/NZIF architecture in a high volume standard product consumer IC. It was also very successful, going to into production "first time right" - not even a metal fix was required. I designed the LNA-mixer, the polyphase filter and the LO path.
Philips UMA1021* 1u BiCMOS Frequency synthesizer
This project went into very high volume production after only one minor metal fix. It was used by many handset manufacturers for applications such as GSM, DCS and DECT. Achieved an excellent close-in phase noise (-90dBc in the GSM band).
Parthus Custom ASIC 0.5u BiCMOS DAB receiver
Co-developed by Parthus and customer. I designed L-band frequency synthesizer and fully integrated VCO.
West Silicon Customer ASIC 90nm CMOS TDMB/DVBH receiver
Single chip RF+Baseband. I worked on RF frontend (mixers, LNAs, etc). Silicon was right first time.
West Silicon Customer ASIC 90nm CMOS UWB transmitter
UWB transmitter operating in bands between 3.5Hz and 6.5GHz. I was responsible for the Tx architecture and most of the circuit design: pulse generator, up-mixer, LO strip, calibration circuits, top level.
West Silicon Customer ASIC 0.35u CMOS Industrial transceiver (220C)
High reliability transceiver operating in extreme pressure and temperature conditions. I defined the ASIC architecture, performed transistor level feasibility study of all key blocks (LNA, PA, fracN synth etc) and supervised implementation of complete chip by third-party design house.
West Silicon Customer ASIC 0.18u CMOS Biosensor AFE
Analog frontend for EEG biosensor, including LNA, switched-cap filters, SAR ADC and very low frequency HPF. I defined the AFE architecture and did all of the circuit design. The chip was right first time.
West Silicon Customer ASIC 0.35u CMOS Pressure sensor AFE
High resolution analog frontend for an industrial pressure sensor, featuring a 24-bit DSM ADC, a 7-bit offset-correction DAC and a PGA. I co-developed the architecture with the customer and then performed all circuit design.

* Project manager and lead designer:
  • Definition of circuit specification and architecture
  • Management of project schedule and resources
  • Coordination and mentoring of design team
  • Supervision of chip evaluation and qualifiation
  • Support for development of production test interfaces and programs